(1) FIELD OF THE INVENTION
The present invention relates to clock circuits and more particularly to a synchronization system for use in a digital switching system including multiple clock circuits.
(2) DESCRIPTION OF THE PRIOR ART
Clock synchronization circuits are old and well known. Typically such synchronization circuits operate as phase locked loop circuits. These circuits, however, require complex logic circuitry and the complexity increases with the accuracy required.
Accordingly it is the object of the present invention to provide a synchronization system which can reduce the phase difference of signals from phase locked loop clock circuits without the requirement of the more complex phase locked loop circuitry used in prior art systems.